• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

The TLK2218 is the third generation of Gigabit Ethernet transceivers from Texas Instruments combining high port density and ultra-low power in a small form-factor footprint. The TLK2218 provides for high-speed full-duplex point-to-point data transmissions based on the IEEE 802.3z 1000-Mbps Ethernet specification. The TLK2218 supports data rates from 1.0 Gbps through 1.3 Gbps in full rate mode, or 0.5 Gbps through 0.65 GbPs in half rate mode.

The primary application of this device is to provide building blocks for developing point-to-point baseband data transmission over controlled impedance media of 50Ω. The transmission media can be printed circuit board traces, copper cables or fiber-optical interface modules.

特性

• Eight 1.0- to 1.3-Gigabits Per Second (Gbps) Synchronizable Transceivers
• Haft-Rate Operation (0.5 to 0.65 Gbps)
• Low Power Consumption <1.3 W Typical at 1.25 Gbps
• IEEE 802.3z Gigabit Ethernet Compliant
• Differential VML Transmit Outputs With No External Components Necessary. PECL Compatible Levels
• Programmable High-Speed Output Preemphasis Levels
• Selectable Parallel Interface Modes:
  • Nibble-Wide Double Data Rate (DDR) Clocking Interface
  • Multiplexed Channel DDR Clock Interface
• Selectable Clock Tolerance Compensation
• Selectable On-Chip 8b/10b IEEE 802.3z Compliant Encoder and Decoder
• JEDEC-Compliant 1.8-V LVCMOS (Extendable to 2.5 V)
• 3.6-V Tolerant Inputs on Parallel I/O
• Internal Series Termination on LVCMOS Outputs to Drive 50- Lines
• Source Centered Timing on Parallel Inputs and Outputs
• Comprehensive Suite of Built-In Testability Features (PRBS Generation and Verification, Serial Loopback, and Far-End Loopback)
• IEEE 802.3 Clause 22 Management Data Interface (MDIO) Support
• IEEE 1149.1 JTAG Support
• Hot-Plug Protection on Serial I/O
• No External Filter Components Required for PLLs