• - 交流-直流(AC-DC)控制器和稳压器
• - 直流-直流(DC-DC)控制器、转换器和稳压器
• - 电压和电流管理
• - 通讯IC
• - 驱动器
• - 热管理

• - 时钟及数据分配
• - 标准逻辑

• - 放大器和比较器
• - 模拟开关
• - 数字电位计
• - 接口
• - EMI和RFI滤波器

• - EEPROM存储器
• - 非易失性只读存储器(NVRAM)
• - SRAM存储器

说明

These quad differential receivers accept digital data overbalanced transmission lines. They translate differential input logic levels to TTL output logic levels.

The TB5R1 is a pin- and function-compatible replacement for the Agere systems BRF1A and BRF2A; it includes 3-kV HBM and 2-kV CDM ESD protection.

The TB5R2 is a pin- and function-compatible replacement for the Agere systems BRS2A and BRS2B and incorporates a 125-mV receiver input offset, preferred state output, 3-kV HBM and 2-kV CDM ESD protection. The TB5R2 preferred state feature places the high state when the inputs are open, shorted to ground, or shorted to the power supply.

The power-down loading characteristics of the receiver input circuit are approximately 8 k relative to the power supplies; hence they do not load the transmission line when the circuit is powered down.

特性

• Functional Replacements for the Agere BRF1A, BRF2A, BRS2A, and BRS2B
• Pin Equivalent to General Trade 26LS32
• High Input Impedance Approximately 8 k
• 4-ns Maximum Propagation Delay
• TB5R1 Provides 50-mV Hysteresis
• TB5R2 With -125-mV Threshold Offset for Preferred State Output
• -1.1-V to 7.1-V Common Mode Range
• Single 5-V ±10% Supply
• Slew Rate Limited (1 ns min 80% to 20%)
• TB5R2 Output Defaults to Logic 1 When Inputs Left Open or Shorted to V_CC or GND
• ESD Protection HBM > 3 kV, CDM > 2 kV
• Operating Temperature Range: -40°C to 85°C
• Available in Gull-Wing SOIC (JEDEC MS-013, DW) and SOIC (D) Package
• APPLICATIONS
  • Digital Data or Clock Transmission Over Balanced Lines